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diff --git a/manufacturer/altera/cyclone10_lp/ip/rgmii_rxd/ddri.ppf b/manufacturer/altera/cyclone10_lp/ip/rgmii_rxd/ddri.ppf
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+++ b/manufacturer/altera/cyclone10_lp/ip/rgmii_rxd/ddri.ppf
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+<?xml version="1.0" encoding="UTF-8" ?>
+<!DOCTYPE pinplan>
+<pinplan intended_family="Cyclone 10 LP" variation_name="ddri" megafunction_name="ALTDDIO_IN" specifies="all_ports">
+<global>
+<pin name="datain[4..0]" direction="input" scope="external" />
+<pin name="inclock" direction="input" scope="external" source="clock" />
+<pin name="dataout_h[4..0]" direction="output" scope="external" />
+<pin name="dataout_l[4..0]" direction="output" scope="external" />
+
+</global>
+</pinplan>

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