Overview
This article reviews the steps taken to add a programmable packet generator capability to the Betsy™ maker board. This requires various changes to the Private Island ® open source FPGA project. Once complete, the soft controller, which can be accessed via the network, can be used to configure the generation of arbitrary Ethernet packets along with their frequency of generation.
The Private Island source code can be found on this website under open source. The Verilog and project changes for packet generation are being implemented inside the pkt_gen branch. The changes will ultimately be merged back into the master branch for Betsy.
Overview of Required Changes
The figure below shows the Private Island Firmware Architecture for Betsy with Packet Generation added (yellow). As depicted in the figure, the generator has two interfaces: 1) soft Ethernet switch; 2) memory mapped controller interface for configuring the generator.
In addition to creating a new Verilog module pkt_gen.v, modifications are required to the Verilog modules listed below.
- soft Ethernet switch (switch.v) to add an additional port(s) and define the priority & switching logic
- soft controller (controller.v) and related to define and support accessing the new memory mapped registers provided by the pkt_gen module
- top Verilog module (betsy.v) to instantiate the new pkt_gen module and define its connectivity to the rest of the system
Refer to the figure below for a high level view of the pkt_gen interfaces.
Open Issues and Assumptions
Listed below are some of the open issues and assumptions for the design and implementation of the packet generator
- Can pkt_gen transmit to any PHY? The initial implementation will only support transmitting to PHY1.
- Generation of invalid packets should be supported, such as a runt packet. Overriding the Ethernet FCS requires additional investigation since this FCS generation is currently implemented as independent module connected to the MAC module. Also, potentially overriding the Ethernet interpacket gap (IPG) requires additional investigation.
Description of pkt_gen.v
To be added.
Change Description for betsy.v
To be added.
Change Description for controller.v
To be added.
Change Description for switch.v
To be added.
