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FPGA network processor
Private Island Networks Inc.
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Author
2023-12-27
drop_fifo: fix up logic when packets are dropped
HEAD
master
Private Island Networks Inc
2021-06-30
controller: rm i2c_fifo_priority because it is no longer used
mindchasers
2021-03-02
switch: add tx_src_sel
mindchasers
2021-03-02
spi: fix write bug
mindchasers
2021-03-02
pkt_filter: add wire for match
mindchasers
2021-03-02
directives: clean up, default is now to define a GIGE shield present
mindchasers
2021-03-02
controller: clean up, tx_metrics becomes tx_custom
mindchasers
2021-03-02
drop_fifo: first pass at a simplified approach
mindchasers
2021-03-02
mac: use an module rather than embedding logic, minor cleanups
mindchasers
2021-03-02
an: encapsulate a simpliied version of SGMII auto negotiation
mindchasers
2020-11-26
project: remove DARSENA_V01 support and minor cleanup
mindchasers
2020-11-20
top: move darsena top under ecp5um folder
mindchasers
2020-11-19
fifos: remove specific sized fifos
mindchasers
2020-11-19
top: add support for custom packet and misc. cleanups
mindchasers
2020-11-19
switch: add support for custom packets
mindchasers
2020-11-19
mac: update for custom packets and clean up logic
mindchasers
2020-11-16
sgmii_params: add additional K codes
mindchasers
2020-11-16
eth_params: add TX_MODE_CUSTOM to support custom MAC layers
mindchasers
2020-11-16
directives: rename file and update for new options
mindchasers
2020-11-15
ecp5um project: restructure so we can add more devices
mindchasers
2020-10-01
link_timer: Generate link timer pulse (1.6 and 10 ms) per SGMII and IEEE 802.3
mindchasers
2019-07-08
top: fix typo for debug defines: DEBUG_I2C
mindchasers
2019-05-01
initial commit, all basic functions work on Darsena V02
mindchasers
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