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BranchCommit messageAuthorAge
darsenamanu: prune and rename to make currentPrivate Island Networks8 months
mastermle: patch files to support FSM3, MLE header, and bug fixesPrivate Island Networks Inc4 weeks
 
 
AgeCommit messageAuthor
2026-02-03mle: patch files to support FSM3, MLE header, and bug fixesHEADmasterPrivate Island Networks Inc
2025-12-21README: update for BetsyPrivate Island Networks Inc
2025-12-21betsy: preliminary beta snapshotPrivate Island Networks Inc
2025-12-21simulation: remove top level directoryPrivate Island Networks Inc
2025-12-21python: add python unit test scriptsPrivate Island Networks Inc
2025-09-01cont: update controller complex for Betsy: see privateisland.tech/dev/pi-cont...Private Island Networks
2025-09-01rename source to srcPrivate Island Networks
2025-07-03manu: prune and rename to make currentdarsenaPrivate Island Networks
2023-12-27drop_fifo: fix up logic when packets are droppedPrivate Island Networks Inc
2021-06-30controller: rm i2c_fifo_priority because it is no longer usedmindchasers
[...]
 
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Digital VLSI Design with Verilog: A Textbook from Silicon Valley Polytechnic Institute
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Verilog HDL A Guide to Digital Design and Synthesis