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<?xml version="1.0" encoding="UTF-8" ?>
<!DOCTYPE pinplan>
<pinplan intended_family="Cyclone 10 LP" variation_name="ddro" megafunction_name="ALTDDIO_OUT" specifies="all_ports">
<global>
<pin name="aclr" direction="input" scope="external" />
<pin name="datain_h[5..0]" direction="input" scope="external" />
<pin name="datain_l[5..0]" direction="input" scope="external" />
<pin name="oe" direction="input" scope="external" />
<pin name="outclock" direction="input" scope="external" source="clock" />
<pin name="dataout[5..0]" direction="output" scope="external" />
</global>
</pinplan>
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