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authorPrivate Island Networks Inc <opensource@privateisland.tech>2025-12-21 20:51:04 -0500
committerPrivate Island Networks Inc <opensource@privateisland.tech>2025-12-21 20:51:04 -0500
commit7b1b5e7eb712d41888398934834cae730e0aa5a0 (patch)
tree8b8aba85e19a079fbbd4962c57ff89ca701c6e4d /manufacturer/altera/cyclone10_lp/ip/rgmii_txd/ddro.ppf
parentf4bdc9f4365d3a3ce3f906e68cd018cb57561e56 (diff)
betsy: preliminary beta snapshot
Diffstat (limited to 'manufacturer/altera/cyclone10_lp/ip/rgmii_txd/ddro.ppf')
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diff --git a/manufacturer/altera/cyclone10_lp/ip/rgmii_txd/ddro.ppf b/manufacturer/altera/cyclone10_lp/ip/rgmii_txd/ddro.ppf
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+<?xml version="1.0" encoding="UTF-8" ?>
+<!DOCTYPE pinplan>
+<pinplan intended_family="Cyclone 10 LP" variation_name="ddro" megafunction_name="ALTDDIO_OUT" specifies="all_ports">
+<global>
+<pin name="aclr" direction="input" scope="external" />
+<pin name="datain_h[5..0]" direction="input" scope="external" />
+<pin name="datain_l[5..0]" direction="input" scope="external" />
+<pin name="oe" direction="input" scope="external" />
+<pin name="outclock" direction="input" scope="external" source="clock" />
+<pin name="dataout[5..0]" direction="output" scope="external" />
+
+</global>
+</pinplan>

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