pll_inst.v « pll « ip « cyclone10_lp « altera « manufacturer - privateisland - FPGA network processor

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pll	pll_inst (
	.areset ( areset_sig ),
	.inclk0 ( inclk0_sig ),
	.c0 ( c0_sig ),
	.c1 ( c1_sig ),
	.locked ( locked_sig )
	);

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