ml_module_agilex3 - ML Module using Agilex 3 for Betsy

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Age	Commit message (Expand)	Author
14 hours	initial commit of design template + starting local librariesHEAD master	Private Island Networks Inc.

Highly Recommended Verilog Books

Digital VLSI Design with Verilog: A Textbook from Silicon Valley Polytechnic Institute

The Verilog Hardware Description Language

Verilog HDL A Guide to Digital Design and Synthesis