summaryrefslogtreecommitdiffhomepage
path: root/fpga_banks_6c_6d.kicad_sch
AgeCommit message (Expand)Author
2026-06-07power: connect all power pins as a first pass, update power symbols, update s...Private Island Networks
2026-06-05update Agliex footprint and symbol, all schematic pages, move bank 3A to lpdd...Private Island Networks Inc.
generated by cgit v1.2.3-8-gadcc (git 2.29.0) at 2026-07-06 16:46:46 +0000

Highly Recommended Verilog Books

Digital VLSI Design with Verilog: A Textbook from Silicon Valley Polytechnic Institute
The Verilog Hardware Description Language
Verilog HDL A Guide to Digital Design and Synthesis