summaryrefslogtreecommitdiffhomepage
path: root/FOOTPRINTS.pretty
AgeCommit message (Expand)Author
120 min.project cleanup for schematic to resolve all ERC errors and warnings, add sym...v02Private Island Networks Inc.
30 hourssch: resolve hundreds of warnings & errors and add missing library partsPrivate Island Networks Inc
3 dayssymbols: clean up schematic symbol file and add three missing footprintsPrivate Island Networks Inc
8 dayspcb: remove HLE alignment pins, realign layers, move power snippet into placePrivate Island Networks Inc.
2026-07-06FOOTPRINTS: clean up several footprints to be consistent with Kicad layers an...Private Island Networks Inc.
2026-06-22add globals for FLASH nets, so they connect between sheetsPrivate Island Networks Inc.
2026-06-21initial commit after restarting project using schematic imports and manual sy...mainPrivate Island Networks Inc.
generated by cgit v1.2.3-8-gadcc (git 2.29.0) at 2026-07-23 23:30:56 +0000

Highly Recommended Verilog Books

Digital VLSI Design with Verilog: A Textbook from Silicon Valley Polytechnic Institute
The Verilog Hardware Description Language
Verilog HDL A Guide to Digital Design and Synthesis