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AgeCommit message (Collapse)Author
2021-03-02top: remap shield I/O to use GPIO rather than specific names, default is now ↵mindchasers
network tap, misc cleanup
2021-03-02ecp5um: include this Lattice file for easy referencemindchasers
2021-03-02update project filemindchasers
2021-03-02lpf: use GPIO for directly instead of specific shield I/O names and general ↵mindchasers
clean up
2021-03-02pin_mux: document GPIO mapping for supported shieldsmindchasers
2021-03-02add Cyclone 10 LP folder to projectmindchasers
2020-11-26project: remove DARSENA_V01 support and minor cleanupmindchasers
2020-11-20manufacturer: estblish trion and cyclone 10 gx foldersmindchasers
2020-11-20top: move darsena top under ecp5um foldermindchasers
2020-11-19lattice: clean up project files to match latest topmindchasers
2020-11-16project: rename device to lattice to include specific manufacturersmindchasers
2020-11-15ecp5um project: restructure so we can add more devicesmindchasers
generated by cgit v1.2.3-8-gadcc (git 2.29.0) at 2025-12-05 06:11:55 +0000

Highly Recommended Verilog Books

Digital VLSI Design with Verilog: A Textbook from Silicon Valley Polytechnic Institute
The Verilog Hardware Description Language
Verilog HDL A Guide to Digital Design and Synthesis