index
:
ml_module_agilex3
master
ML Module using Agilex 3 for Betsy
Private Island Networks Inc.
summary
refs
log
tree
commit
diff
homepage
log msg
author
committer
range
Age
Commit message (
Collapse
)
Author
9 days
pcb: update PCB from schematic after last changes from previous commit
HEAD
master
Private Island Networks
9 days
power: connect all power pins as a first pass, update power symbols, update ↵
Private Island Networks
symbols as needed, update pcb with changes
10 days
pcb: change from 4 layers to 6, rename signal and plane layer names, update ↵
Private Island Networks
zones for planes
10 days
fixup Agilex symbol with missing and incorrect I/O. Update impacted ↵
Private Island Networks
schematic sheets
11 days
update Agliex footprint and symbol, all schematic pages, move bank 3A to ↵
Private Island Networks Inc.
lpddr, create initial FPGA trace, import power circuit
2026-05-19
project: create starting sheets for project and populate FPGA banks
Private Island Networks Inc.
2026-05-19
SYMBOLS: import Kevin's A3CY050B schematic symbol and make editorial changes ↵
Private Island Networks Inc.
and additions
2026-05-17
add Agilex 3 PCB Footprint to symbol folder and place in PCB
Private Island Networks Inc.
2026-05-10
add LTM4668A Quad Regulator and MT25Q Config ROM
Private Island Networks Inc.
2026-05-06
initial commit of design template + starting local libraries
Private Island Networks Inc.
Highly Recommended Verilog Books