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2020-11-26project: remove DARSENA_V01 support and minor cleanupmindchasers
2020-11-19top: add support for custom packet and misc. cleanupsmindchasers
2020-11-16directives: rename file and update for new optionsmindchasers
generated by cgit v1.2.3-8-gadcc (git 2.29.0) at 2024-11-10 03:21:04 +0000

Highly Recommended Verilog Books

Digital VLSI Design with Verilog: A Textbook from Silicon Valley Polytechnic Institute
The Verilog Hardware Description Language
Verilog HDL A Guide to Digital Design and Synthesis