3 files changed, 0 insertions, 53 deletions
diff --git a/clarity/pcs/refclk0/refclk0.fdc b/clarity/pcs/refclk0/refclk0.fdc
deleted file mode 100644
index 6fbcac9..0000000
--- a/clarity/pcs/refclk0/refclk0.fdc
+++ /dev/null
@@ -1,2 +0,0 @@
-###==== Start Configuration
-
diff --git a/clarity/pcs/refclk0/refclk0.lpc b/clarity/pcs/refclk0/refclk0.lpc
deleted file mode 100644
index 1894b2d..0000000
--- a/clarity/pcs/refclk0/refclk0.lpc
+++ /dev/null
@@ -1,31 +0,0 @@
-[Device]
-Family=ecp5um
-OperatingCondition=COM
-Package=CABGA381
-PartName=LFE5UM-45F-8BG381C
-PartType=LFE5UM-45F
-SpeedGrade=8
-Status=P
-[IP]
-CoreName=EXTREF
-CoreRevision=1.1
-CoreStatus=Demo
-CoreType=LPM
-Date=03/06/2020
-ModuleName=refclk0
-ParameterFileVersion=1.0
-SourceFormat=verilog
-Time=20:20:44
-VendorName=Lattice Semiconductor Corporation
-[Parameters]
-Destination=Synplicity
-EDIF=1
-EXTREFDCBIAS=Disabled
-EXTREFTERMRES=50 ohms
-Expression=BusA(0 to 7)
-IO=0
-Order=Big Endian [MSB:LSB]
-VHDL=0
-Verilog=1
-[SYSTEMPNR]
-EXTREF=DCU0
diff --git a/clarity/pcs/refclk0/refclk0.v b/clarity/pcs/refclk0/refclk0.v
deleted file mode 100644
index edeb81f..0000000
--- a/clarity/pcs/refclk0/refclk0.v
+++ /dev/null
@@ -1,20 +0,0 @@
-// Verilog netlist produced by program ASBGen: Ports rev. 2.30, Attr. rev. 2.65
-// Netlist written on Fri Mar 06 20:20:57 2020
-//
-// Verilog Description of module refclk0
-//
-
-`timescale 1ns/1ps
-module refclk0 (refclkp, refclkn, refclko);
-    input refclkp;
-    input refclkn;
-    output refclko;
-    
-    
-    EXTREFB EXTREF0_inst (.REFCLKP(refclkp), .REFCLKN(refclkn), .REFCLKO(refclko)) /* synthesis LOC=EXTREF0 */ ;
-    defparam EXTREF0_inst.REFCK_PWDNB = "0b1";
-    defparam EXTREF0_inst.REFCK_RTERM = "0b1";
-    defparam EXTREF0_inst.REFCK_DCBIAS_EN = "0b0";
-    
-endmodule
-