src: modify gpio i/o size, replace hard addresses with params, misc fix ups

2 files changed, 27 insertions, 19 deletions

diff --git a/manufacturer/altera/cyclone10_lp/src/betsy.v b/manufacturer/altera/cyclone10_lp/src/betsy.v
index c388429..e77635f 100644
--- a/manufacturer/altera/cyclone10_lp/src/betsy.v
+++ b/manufacturer/altera/cyclone10_lp/src/betsy.v
@@ -21,8 +21,6 @@
  */ 
 
 // `define PASSTHROUGH
-//`define PHY2_PRESENT
-`define GPIO_PRESENT
  
 module  betsy (
 	input rstn,
@@ -76,7 +74,7 @@ module  betsy (
 // If not replaced, PHY2 continues.	
 //====================================
 `ifdef GPIO_PRESENT
-	inout [19:0] gpio,
+	inout [17:0] gpio,
 `else
 	// PHY2 RGMII
 	output phy2_rstn,
@@ -127,9 +125,9 @@ module  betsy (
 // for the bidirectional GPIO pins.
 // ============================================================
 `ifdef GPIO_PRESENT
-   wire [19:0] gpio_in;
-   wire [19:0] gpio_out;
-   wire [19:0] gpio_out_en;
+   wire [17:0] gpio_in;
+   wire [17:0] gpio_out;
+   wire [17:0] gpio_out_en;
 `endif
 
 	reg [3:0] cnt_init;
@@ -375,7 +373,7 @@ module  betsy (
 `ifdef GPIO_PRESENT
     genvar i;
     generate
-        for (i = 0; i < 20; i = i + 1) begin : gpio_tri
+        for (i = 0; i <= 17; i = i + 1) begin : gpio_tri
             assign gpio[i] = gpio_out_en[i] ? gpio_out[i] : 1'bz;
         end
     endgenerate
diff --git a/src/controller.v b/src/controller.v
index b0e7689..b79fe28 100644
--- a/src/controller.v
+++ b/src/controller.v
@@ -81,9 +81,9 @@ module controller	#(parameter MDIO_ADDR_SZ = 7, parameter NUM_PHYS=3)
 // GPIO INTERFACE
 // ===========================
 `ifdef GPIO_PRESENT
-	input [19:0] gpio_in,
-	output [19:0] gpio_out,
-	output [19:0] gpio_out_en
+	input [17:0] gpio_in,
+	output [17:0] gpio_out,
+	output [17:0] gpio_out_en
 `else
 	output [7:0] gpio
 `endif
@@ -127,6 +127,13 @@ module controller	#(parameter MDIO_ADDR_SZ = 7, parameter NUM_PHYS=3)
 		PKT_FILT_ADDR = 	16'h0018,
 		RX_MSG_CNT_ADDR = 	16'h0020,
 		TX_PKT_CNT_ADDR = 	16'h0024;
+		
+`ifdef GPIO_PRESENT
+	localparam 
+		GPIO_DIR_ADDR = 	16'h0030,
+		GPIO_VALUE_ADDR = 	16'h0034;		
+`endif
+
 
 	/* Define Variables and Nets Below */	
 	reg [2:0] cont_state;
@@ -139,8 +146,8 @@ module controller	#(parameter MDIO_ADDR_SZ = 7, parameter NUM_PHYS=3)
 // GPIO REGISTERS
 // ============================
 `ifdef GPIO_PRESENT 
-	reg [19:0] gpio_direction; //1 = output, 0 = input
-	reg [19:0] gpio_value;
+	reg [17:0] gpio_direction; //1 = output, 0 = input
+	reg [17:0] gpio_value;
 `endif
 	
 	// metastability synchronizer regs
@@ -299,6 +306,10 @@ module controller	#(parameter MDIO_ADDR_SZ = 7, parameter NUM_PHYS=3)
 					(msg_addr == RX_MSG_CNT_ADDR || msg_addr == TX_PKT_CNT_ADDR) || 
 					(msg_addr >= MSG_MAC_ADDR && msg_addr < MSG_INVALID_ADDR))
 				msg_addr_valid <= 1'b1;
+`ifdef GPIO_PRESENT
+			else if (msg_addr == GPIO_DIR_ADDR || msg_addr == GPIO_VALUE_ADDR)
+				msg_addr_valid <= 1'b1;
+`endif
 			else
 				msg_addr_valid <= 1'b0;
 		
@@ -357,11 +368,10 @@ module controller	#(parameter MDIO_ADDR_SZ = 7, parameter NUM_PHYS=3)
 				TX_PKT_CNT_ADDR : msg_response <= tx_msg_cnt;
 				{MSG_MAC_ADDR[15:8],8'h??}: msg_response <= mem_d_i;
 				{MSG_MDIO_ADDR[15:8],8'h??}: msg_response <= mdio_d;
-				{MSG_MLE_ADDR[15:8],8'h??}: msg_response <= mem_d_i;
+				{MSG_MLE_ADDR[15:8],8'h??}: msg_response <= mem_d_i;		
 `ifdef GPIO_PRESENT
-    16'h0030: msg_response <= gpio_direction;
-    16'h0034: msg_response <= gpio_value;
-    16'h0038: msg_response <= gpio_in;
+				GPIO_DIR_ADDR: msg_response <= gpio_direction;
+				GPIO_VALUE_ADDR: msg_response <= gpio_in;
 `endif
 				default: msg_response <= mem_d_i[15:0];
 			endcase
@@ -750,9 +760,9 @@ module controller	#(parameter MDIO_ADDR_SZ = 7, parameter NUM_PHYS=3)
 				pkt_filter_addr <= msg_data[15:0];
 	`ifdef GPIO_PRESENT
 		else if (msg_addr == 16'h0030)
-			gpio_direction <= msg_data[19:0];
+			gpio_direction <= msg_data[17:0];
 		else if (msg_addr == 16'h0034)
-			gpio_value <= msg_data[19:0];
+			gpio_value <= msg_data[17:0];
 	`endif
 		end
 		
@@ -839,4 +849,4 @@ module controller	#(parameter MDIO_ADDR_SZ = 7, parameter NUM_PHYS=3)
 
 
 			
-endmodule
\ No newline at end of file
+endmodule