From 6e0b5af5c789ca6fc3fa6d28300e30d9b3803e76 Mon Sep 17 00:00:00 2001 From: Private Island Networks Inc Date: Tue, 3 Feb 2026 15:58:01 -0500 Subject: mle: patch files to support FSM3, MLE header, and bug fixes --- src/mac_rgmii.v | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) (limited to 'src/mac_rgmii.v') diff --git a/src/mac_rgmii.v b/src/mac_rgmii.v index aa96705..b6ae629 100644 --- a/src/mac_rgmii.v +++ b/src/mac_rgmii.v @@ -20,7 +20,7 @@ * */ -module mac_rgmii( +module mac_rgmii #(parameter PHY_NUM=0) ( input rstn, input phy_resetn, // The external PHY has its reset signal asserted input rx_clk, // rx_clk @@ -42,7 +42,7 @@ module mac_rgmii( input mle_if_oe, output reg mle_if_we, output reg mle_if_empty, - output reg [8:0] mle_if_d_o, + output [8:0] mle_if_d_o, // Line State input fixed_speed, // 0 = 100 MBit, 1 = GigE @@ -195,6 +195,7 @@ module mac_rgmii( // ML Engine reg [3:0] mle_if_cnt; + reg [8:0] mle_if_d; // Metrics reg [15:0] rx_pkt_cnt; @@ -252,18 +253,20 @@ module mac_rgmii( end - // mle_if_d_o: + // mle_if_d: always @(posedge tx_clk, negedge rstn) if(!rstn) - mle_if_d_o <= 'd0; + mle_if_d <= 'd0; else if (mle_if_enable) begin if (mle_if_cnt > 4'd1) - mle_if_d_o <= mle_if_d_o + 1'b1; + mle_if_d <= mle_if_d + 1'b1; else if (mle_if_cnt == 4'd1) - mle_if_d_o <= (mle_if_d_o + 1'b1) | 9'h100; + mle_if_d <= (mle_if_d + 1'b1) | 9'h100; else - mle_if_d_o <= 'd0; + mle_if_d <= 'd0; end + + assign mle_if_d_o = mle_if_d + PHY_NUM; -- cgit v1.2.3-8-gadcc