From 3f27dd29f10ade4ec76cdda0459fdf0464b19a7e Mon Sep 17 00:00:00 2001 From: "Private Island Networks Inc." Date: Mon, 6 Jul 2026 13:58:40 -0400 Subject: src: modify gpio i/o size, replace hard addresses with params, misc fix ups --- manufacturer/altera/cyclone10_lp/src/betsy.v | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) (limited to 'manufacturer/altera/cyclone10_lp/src') diff --git a/manufacturer/altera/cyclone10_lp/src/betsy.v b/manufacturer/altera/cyclone10_lp/src/betsy.v index c388429..e77635f 100644 --- a/manufacturer/altera/cyclone10_lp/src/betsy.v +++ b/manufacturer/altera/cyclone10_lp/src/betsy.v @@ -21,8 +21,6 @@ */ // `define PASSTHROUGH -//`define PHY2_PRESENT -`define GPIO_PRESENT module betsy ( input rstn, @@ -76,7 +74,7 @@ module betsy ( // If not replaced, PHY2 continues. //==================================== `ifdef GPIO_PRESENT - inout [19:0] gpio, + inout [17:0] gpio, `else // PHY2 RGMII output phy2_rstn, @@ -127,9 +125,9 @@ module betsy ( // for the bidirectional GPIO pins. // ============================================================ `ifdef GPIO_PRESENT - wire [19:0] gpio_in; - wire [19:0] gpio_out; - wire [19:0] gpio_out_en; + wire [17:0] gpio_in; + wire [17:0] gpio_out; + wire [17:0] gpio_out_en; `endif reg [3:0] cnt_init; @@ -375,7 +373,7 @@ module betsy ( `ifdef GPIO_PRESENT genvar i; generate - for (i = 0; i < 20; i = i + 1) begin : gpio_tri + for (i = 0; i <= 17; i = i + 1) begin : gpio_tri assign gpio[i] = gpio_out_en[i] ? gpio_out[i] : 1'bz; end endgenerate -- cgit v1.2.3-8-gadcc