From 7b1b5e7eb712d41888398934834cae730e0aa5a0 Mon Sep 17 00:00:00 2001 From: Private Island Networks Inc Date: Sun, 21 Dec 2025 20:51:04 -0500 Subject: betsy: preliminary beta snapshot --- .../altera/cyclone10_lp/ip/rgmii_txd/ddro.inc | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 manufacturer/altera/cyclone10_lp/ip/rgmii_txd/ddro.inc (limited to 'manufacturer/altera/cyclone10_lp/ip/rgmii_txd/ddro.inc') diff --git a/manufacturer/altera/cyclone10_lp/ip/rgmii_txd/ddro.inc b/manufacturer/altera/cyclone10_lp/ip/rgmii_txd/ddro.inc new file mode 100644 index 0000000..98c6145 --- /dev/null +++ b/manufacturer/altera/cyclone10_lp/ip/rgmii_txd/ddro.inc @@ -0,0 +1,28 @@ +--Copyright (C) 2025 Altera Corporation. All rights reserved. +--Your use of Altera Corporation's design tools, logic functions +--and other software and tools, and any partner logic +--functions, and any output files from any of the foregoing +--(including device programming or simulation files), and any +--associated documentation or information are expressly subject +--to the terms and conditions of the Altera Program License +--Subscription Agreement, the Altera Quartus Prime License Agreement, +--the Altera IP License Agreement, or other applicable license +--agreement, including, without limitation, that your use is for +--the sole purpose of programming logic devices manufactured by +--Altera and sold by Altera or its authorized distributors. Please +--refer to the Altera Software License Subscription Agreements +--on the Quartus Prime software download page. + + +FUNCTION ddro +( + aclr, + datain_h[5..0], + datain_l[5..0], + oe, + outclock +) + +RETURNS ( + dataout[5..0] +); -- cgit v1.2.3-8-gadcc