From de26fff172b7b3d2019c2ab52ab0c98536e461d4 Mon Sep 17 00:00:00 2001
From: mindchasers <privateisland@mindchasers.com>
Date: Mon, 8 Jul 2019 19:31:05 -0400
Subject: reveal: add labs reveal files to support lab exercises

---
 boards/darsena/labs.rvs | 102 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 102 insertions(+)
 create mode 100644 boards/darsena/labs.rvs

(limited to 'boards/darsena/labs.rvs')

diff --git a/boards/darsena/labs.rvs b/boards/darsena/labs.rvs
new file mode 100644
index 0000000..67553e6
--- /dev/null
+++ b/boards/darsena/labs.rvs
@@ -0,0 +1,102 @@
+<Project ModBy="Analyzer" Name="C:/projects/lattice/privateisland/boards/darsena/labs.rvs" Date="2019-07-08">
+ <Core Name="lab_1_i2c">
+  <Setting>
+   <Capture SamplesPerTrig="2048" NumTrigsCap="1"/>
+   <Event EventCnt="0" CntEnableRun="0"/>
+   <TrigSetting PreTrgSamples="" AND_ALL="0" PostTrgSamples="" TURadix="0"/>
+  </Setting>
+  <Dataset Name="Base">
+   <Trace>
+    <Sig Name="i2c_0/scl_i"/>
+    <Sig Name="i2c_0/scl_i_m1"/>
+    <Sig Name="i2c_0/scl_i_m2"/>
+    <Sig Name="i2c_0/scl_high"/>
+    <Sig Name="i2c_0/scl_low"/>
+    <Sig Name="i2c_0/sda_i"/>
+    <Sig Name="i2c_0/sda_i_m1"/>
+    <Sig Name="i2c_0/start"/>
+    <Sig Name="i2c_0/stop"/>
+    <Sig Name="i2c_0/run"/>
+    <Bus Name="i2c_0/bit_cnt" Radix="0">
+     <Sig Name="i2c_0/bit_cnt:0"/>
+     <Sig Name="i2c_0/bit_cnt:1"/>
+     <Sig Name="i2c_0/bit_cnt:2"/>
+     <Sig Name="i2c_0/bit_cnt:3"/>
+     <Sig Name="i2c_0/bit_cnt:4"/>
+    </Bus>
+    <Bus Name="i2c_0/dev_ad" Radix="0">
+     <Sig Name="i2c_0/dev_ad:0"/>
+     <Sig Name="i2c_0/dev_ad:1"/>
+     <Sig Name="i2c_0/dev_ad:2"/>
+     <Sig Name="i2c_0/dev_ad:3"/>
+     <Sig Name="i2c_0/dev_ad:4"/>
+     <Sig Name="i2c_0/dev_ad:5"/>
+     <Sig Name="i2c_0/dev_ad:6"/>
+    </Bus>
+    <Bus Name="i2c_0/addr" Radix="0">
+     <Sig Name="i2c_0/addr:0"/>
+     <Sig Name="i2c_0/addr:1"/>
+     <Sig Name="i2c_0/addr:2"/>
+     <Sig Name="i2c_0/addr:3"/>
+     <Sig Name="i2c_0/addr:4"/>
+     <Sig Name="i2c_0/addr:5"/>
+     <Sig Name="i2c_0/addr:6"/>
+     <Sig Name="i2c_0/addr:7"/>
+    </Bus>
+    <Bus Name="i2c_0/d" Radix="0">
+     <Sig Name="i2c_0/d:0"/>
+     <Sig Name="i2c_0/d:1"/>
+     <Sig Name="i2c_0/d:2"/>
+     <Sig Name="i2c_0/d:3"/>
+     <Sig Name="i2c_0/d:4"/>
+     <Sig Name="i2c_0/d:5"/>
+     <Sig Name="i2c_0/d:6"/>
+     <Sig Name="i2c_0/d:7"/>
+    </Bus>
+    <Sig Name="i2c_0/ack"/>
+    <Sig Name="i2c_0/rwn"/>
+    <Sig Name="i2c_0/cont_sel"/>
+    <Sig Name="i2c_0/cont_done"/>
+    <Bus Name="i2c_0/fifo_di" Radix="0">
+     <Sig Name="i2c_0/fifo_di:0"/>
+     <Sig Name="i2c_0/fifo_di:1"/>
+     <Sig Name="i2c_0/fifo_di:2"/>
+     <Sig Name="i2c_0/fifo_di:3"/>
+     <Sig Name="i2c_0/fifo_di:4"/>
+     <Sig Name="i2c_0/fifo_di:5"/>
+     <Sig Name="i2c_0/fifo_di:6"/>
+    </Bus>
+    <Sig Name="i2c_0/mem_we"/>
+    <Sig Name="i2c_0/cont_we"/>
+    <Bus Name="i2c_0/mem_do" Radix="0">
+     <Sig Name="i2c_0/mem_do:0"/>
+     <Sig Name="i2c_0/mem_do:1"/>
+     <Sig Name="i2c_0/mem_do:2"/>
+     <Sig Name="i2c_0/mem_do:3"/>
+     <Sig Name="i2c_0/mem_do:4"/>
+     <Sig Name="i2c_0/mem_do:5"/>
+     <Sig Name="i2c_0/mem_do:6"/>
+     <Sig Name="i2c_0/mem_do:7"/>
+    </Bus>
+    <Sig Name="i2c_0/fifo_re"/>
+    <Bus Name="i2c_0/i_di" Radix="0">
+     <Sig Name="i2c_0/i_di:0"/>
+     <Sig Name="i2c_0/i_di:1"/>
+     <Sig Name="i2c_0/i_di:2"/>
+     <Sig Name="i2c_0/i_di:3"/>
+     <Sig Name="i2c_0/i_di:4"/>
+     <Sig Name="i2c_0/i_di:5"/>
+     <Sig Name="i2c_0/i_di:6"/>
+     <Sig Name="i2c_0/i_di:7"/>
+    </Bus>
+    <Sig Name="i2c_0/sda_o"/>
+    <Sig Name="i2c_0/sda_oe"/>
+    <Sig Name="i2c_0/tx_fifo_empty"/>
+   </Trace>
+   <Trigger>
+    <TU Operator="0" Name="TU1" ID="1" Value="1" Radix="0"/>
+    <TE Enable="1" Expression="TU1" Name="TE1" ID="1"/>
+   </Trigger>
+  </Dataset>
+ </Core>
+</Project>
-- 
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