privateisland/manufacturer/lattice/ecp5um/boards, branch master Open Source FPGA Verilog Project for Networking https://privateisland.tech/repos/cgit.cgi/privateisland/atom?h=master 2021-03-02T17:18:16Z lpf: use GPIO for directly instead of specific shield I/O names and general clean up 2021-03-02T17:18:16Z mindchasers privateisland@mindchasers.com 2021-03-02T17:18:16Z urn:sha1:9a616927d7095d7afef9684c5569ab233c59fdcb pin_mux: document GPIO mapping for supported shields 2021-03-02T17:12:38Z mindchasers privateisland@mindchasers.com 2021-03-02T17:12:38Z urn:sha1:2bc0325caea00d2c974945ed71300286b75cb4f8 lattice: clean up project files to match latest top 2020-11-20T03:26:59Z mindchasers privateisland@mindchasers.com 2020-11-20T03:26:59Z urn:sha1:f5ad249daef5d214e9dfcf2a8111f7ccdb00a6ef project: rename device to lattice to include specific manufacturers 2020-11-16T22:10:41Z mindchasers privateisland@mindchasers.com 2020-11-16T22:10:41Z urn:sha1:6e969b02b4f6266bb9af926bfba6698468c74c28