aboutsummaryrefslogtreecommitdiffhomepage
path: root/sim/win/sim.do
diff options
context:
space:
mode:
authorPrivate Island Networks Inc <opensource@privateisland.tech>2026-05-13 12:52:39 -0400
committerPrivate Island Networks Inc <opensource@privateisland.tech>2026-05-13 12:52:39 -0400
commit694f71a280c7c386a7f9c6dcc220563fe7b61313 (patch)
treed2624afb31f6d6da08624d4c2175a00fc2ad0eb5 /sim/win/sim.do
initial commit, see README in top folderHEADmaster
Diffstat (limited to 'sim/win/sim.do')
-rw-r--r--sim/win/sim.do2
1 files changed, 2 insertions, 0 deletions
diff --git a/sim/win/sim.do b/sim/win/sim.do
new file mode 100644
index 0000000..5277b81
--- /dev/null
+++ b/sim/win/sim.do
@@ -0,0 +1,2 @@
+# assumes the work libraries are already built.
+vsim -voptargs="+acc" -L work -L work_lib -L lpm_ver -L sgate_ver -L altera_ver -L altera_mf_ver -L altera_lnsim_ver -L tennm_ver -L tennm_sm_hps_ver -L tennm_sm4_hssi_ver -L tennm_revb_hvio_ver -L tennm_revb_io96_ver -L altera_iopll_2110 -L pll_io -L altera_gpio_core10_ph2_2210 -L altera_gpio_2300 -L ddr_o -L ddr_i tb \ No newline at end of file

Highly Recommended Verilog Books